About me
Chen Ben Haroosh
Verification Engineer // Hardware tinkerer // Python Enthusiast
I’m a dedicated Verification Engineer with over 3 years of experience in designing and implementing UVM-based verification environments for SoC designs. My expertise lies in developing reusable verification components, implementing Constrained Random Testing, and achieving functional coverage goals that ensure robust, reliable systems.
My Professional Journey
My career path has given me valuable perspective on the full product lifecycle. After completing my military service, I worked at Niron Systems & Projects developing automatic test equipment, where I gained hands-on experience with cutting-edge systems and honed my problem-solving abilities.
I then moved to Microchip, starting in Post-Silicon Validation where I developed automated test platforms and built robust test infrastructure by leveraging hardware-software interaction knowledge. This experience provided me with a deep system-level understanding that proved invaluable when I transitioned to my next role in Microchip as a Verification Engineering where I take full ownership of verification environments for Power over Ethernet (PoE) integrated circuits..
Education & Technical Skills
Beyond the Technical
I’m passionate about leveraging innovative solutions to ensure design reliability and scalability. I believe that verification is not just about finding bugs but about ensuring quality through systematic approaches and creative problem-solving.
Hobbies
When I’m not immersed in verification challenges, I enjoy tinkering with (real) hardware – personal projects in the fields of smart home, Cyber Security and IoT.
I enjoy coding in:
You are invited to read my blog where I intend to write about all those fields and maybe about myself.
Have a great idea?
Let’s talk about It
