Category UVM Verification

UVM Verification

Breaking Free from uvm_config_db: Embracing the Full Power of UVM Resources

Introduction Throughout my verification career, I’ve consistently used uvm_config_db as my go-to mechanism for sharing data between components in UVM testbenches. It’s ubiquitous in training materials, example code, and verification environments. However, after reading Cliff Cummings’ illuminating paper “The Untapped…

Chen
March 17, 2025

UVM Verification

a UVM Testbench for Out-of-Order Transaction Verification

In modern SoC designs, transaction routing through multiple paths is a common scenario. When the same transaction can take different routes with variable delays, ensuring data consistency becomes challenging. This blog post explores a UVM testbench architecture designed to verify out-of-order transaction handling while maintaining correct ordering for transactions with matching IDs.

Chen
March 9, 2025

Breaking Free from uvm_config_db: Embracing the Full Power of UVM Resources

a UVM Testbench for Out-of-Order Transaction Verification

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