Chen

Chen

חובב טכנולוגיה, בפרט אלקטרוניקה ומה שקשור. ביום עושה Logic Verification ובערב מתכנת ומפתח MVP (as in Minimum Viable Product)
  • Joined: January 11, 2025
  • Articles: 16
  • Comments: 2

The State of IC/ASIC Verification in 2024: Promise and Pitfalls

The recently released 2024 Wilson Research Group Functional Verification Study offers a fascinating window into the world of IC/ASIC design and verification. As chips become increasingly complex and integrated into every aspect of our digital lives, understanding the verification landscape is crucial for industry professionals, investors, and technology enthusiasts alike.

a UVM Testbench for Out-of-Order Transaction Verification

In modern SoC designs, transaction routing through multiple paths is a common scenario. When the same transaction can take different routes with variable delays, ensuring data consistency becomes challenging. This blog post explores a UVM testbench architecture designed to verify out-of-order transaction handling while maintaining correct ordering for transactions with matching IDs.